RTL Design #18 · 2026-10-11 · Serial receivers · Medium · about 15 min

A receiver that needs a breather between bytes

frame_rx receives bytes from a serial line, one bit per clock. The line idles at 1, and a frame is ten bits:

• a start bit (0),
• eight data bits, least significant first,
• a stop bit, which should be 1.

In the cycle after the edge that samples the stop bit, the receiver reports the frame for exactly one cycle: valid = 1 with the byte on data if the stop bit was 1, or ferr = 1 if it was 0. Either way it is then done with that frame: the bit after the stop bit is a start bit if it is 0, and an idle bit if it is 1. A sender in a hurry leaves no idle bits at all.

The current receiver gets frames right when there is idle time between them, and loses or garbles bytes when there isn't. Fix frame_rx.sv.

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